; ------------------------------------------------------------------------ ; ; Title: ; ; PD64 -- PIC frequency divider to divide by 64 (and 128 and 256 and 1024) ; ; Function: ; ; This PIC program implements a digital frequency divider: the external ; input clock is divided by a factor of 64 to drive a 3-bit binary output. ; For example, if the input clock is 32768 Hz, the three output frequencies ; are 512 Hz, 256 Hz, and 512 Hz. ; For example, if the input clock is 20 MHz, the three output frequencies ; are 312.5 kHz, 156.25 kHz, and 78.125 kHz. ; As a bonus GP4/pin3 has a divide by 1024 output. ; All outputs are square waves. ; ; Diagram: ; ---__--- ; 5V (Vdd) +++++|1 8|===== Ground (Vss) ; input clock ---->|2 pD 7|----> clock / 64 ; clock / 1024 <----|3 64 6|----> clock / 128 ; o|4 5|----> clock / 256 ; -------- ; Notes: ; ; o Suggestion: tie floating input pin4/GP3 to Vdd or Vss. ; Input clock can be any frequency from 0 to 20 MHz. ; Output frequency accuracy is perfectly as accurate as input clock. ; Output drive current is 25 mA maximum per pin, 90 mA per package. ; Coded for Microchip 12F675 but any '609 '615 '629 '635 '675 '683 works. ; ; Version: ; ; 13-Mar-2015 Tom Van Baak (tvb) www.LeapSecond.com/pic ; ; ------------------------------------------------------------------------ ; Microchip MPLAB IDE assembler code (mpasm). list p=pic12f675 include p12f675.inc __config _EC_OSC & _MCLRE_OFF & _WDT_OFF ; One-time PIC 12F675 initialization. movlw 0x07 ; turn comparator off movwf CMCON ; clrf GPIO ; set output latches low bsf STATUS,RP0 ; bank 1 clrf ANSEL-0x80 ; all digital (no analog) pins clrf TRISIO-0x80 ; set all possible pins output bcf STATUS,RP0 ; bank 0 movlw 0 ; ; An 8 instruction cycle W counting loop divides the external clock by 64. loop: goto $+1 ; movwf GPIO ; goto $+1 ; addlw 1 ; goto loop ; end